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Dr. S. P. Jeng / 鄭心圃

Director, 3D IC

TSMC
 
 

Profile:

 
Dr. SP Jeng is currently the director of 3DIC/IIPD Division in TSMC.  Prior to joining TSMC, he worked at WSMC, Applied Materials and Texas Instruments. He also did his post-doctoral studies at Yale University. He holds a doctoral degree in Materials Science and Engineering from the University of Florida in Gainesville (USA). Dr. Jeng won the 2nd National Industrial Innovation Award (ROC) in 2012.
 
   
Abstract:  
   
3D IC Integration Challenges and Opportunities

 

As a highly anticipated technology, 3D IC is capable of enhancing overall chip performance and achieving high density heterogeneous system integration by utilizing through-silicon-vias (TSV) and chip stacking. The majority of technological barriers posed by 3D IC, from a process standpoint, have been overcome; some early products utilizing fine-pitch TSV have been recently demonstrated. However, the extensive use of 3D IC depends on several factors, including the availability of stacked memory, design ecosystems, test methodology, thermal solutions, and cost. Moreover, challenges due to heterogeneous chip integration involving dies from different sources, as well as potentially complicated chip-package-interaction (CPI) need to be resolved. To overcome these integration challenges, we closely collaborate with EDA partners and customers on design ecosystems, and build a simplified 3D IC integration supply chain to quickly improve and stabilize overall integrated yield, and reduce reliability risks.